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drz80.h
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1 /*
2  * DrZ80 Version 1.0
3  * Z80 Emulator by Reesy
4  * Copyright 2005 Reesy
5  *
6  * This file is part of DrZ80.
7  *
8  * DrZ80 is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * DrZ80 is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with DrZ80; if not, write to the Free Software
20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21  *
22  */
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 #ifndef DRZ80_H
29 #define DRZ80_H
30 
31 extern int DrZ80Ver; /* Version number of library */
32 
33 struct DrZ80
34 {
35  unsigned int Z80PC; /*0x00 - PC Program Counter (Memory Base + PC) */
36  unsigned int Z80A; /*0x04 - A Register: 0xAA------ */
37  unsigned int Z80F; /*0x08 - F Register: 0xFF------ */
38  unsigned int Z80BC; /*0x0C - BC Registers: 0xBBCC---- */
39  unsigned int Z80DE; /*0x10 - DE Registers: 0xDDEE---- */
40  unsigned int Z80HL; /*0x14 - HL Registers: 0xHHLL---- */
41  unsigned int Z80SP; /*0x18 - SP Stack Pointer (Memory Base + PC) */
42  unsigned int Z80PC_BASE; /*0x1C - PC Program Counter (Memory Base) */
43  unsigned int Z80SP_BASE; /*0x20 - SP Stack Pointer (Memory Base) */
44  unsigned int Z80IX; /*0x24 - IX Index Register */
45  unsigned int Z80IY; /*0x28 - IY Index Register */
46  unsigned int Z80I; /*0x2C - I Interrupt Register */
47  unsigned int Z80A2; /*0x30 - A' Register: 0xAA------ */
48  unsigned int Z80F2; /*0x34 - F' Register: 0xFF------ */
49  unsigned int Z80BC2; /*0x38 - B'C' Registers: 0xBBCC---- */
50  unsigned int Z80DE2; /*0x3C - D'E' Registers: 0xDDEE---- */
51  unsigned int Z80HL2; /*0x40 - H'L' Registers: 0xHHLL---- */
52  int cycles; /*0x44 - Cycles pending to be executed yet */
53  int previouspc; /*0x48 - Previous PC */
54  unsigned char Z80_IRQ; /*0x4C - Set IRQ Number (must be halfword aligned) */
55  unsigned char Z80IF; /*0x4D - Interrupt Flags: bit1=_IFF1, bit2=_IFF2, bit3=_HALT */
56  unsigned char Z80IM; /*0x4E - Set IRQ Mode */
57  unsigned char Z80R; /*0x4F - R register */
58  unsigned int z80irqvector; /*0x50 - Set IRQ Vector i.e. 0xFF=RST */
59  void (*z80_irq_callback )(void);
60  void (*z80_write8 )(unsigned char d,unsigned short a);
61  void (*z80_write16 )(unsigned short d,unsigned short a);
62  unsigned char (*z80_in)(unsigned short p);
63  void (*z80_out )(unsigned short p,unsigned char d);
64  unsigned char (*z80_read8)(unsigned short a);
65  unsigned short (*z80_read16)(unsigned short a);
66  unsigned int (*z80_rebaseSP)(unsigned short new_sp);
67  unsigned int (*z80_rebasePC)(unsigned short new_pc);
68  unsigned int bla;
69 };
70 
71 extern int DrZ80Run(struct DrZ80 *pcy,unsigned int cyc);
72 
73 #endif
74 
75 #ifdef __cplusplus
76 } /* End of extern "C" */
77 #endif